As a conventional technology with respect to a digital audio circuit and a power source circuit for supplying a power source to the digital audio circuit, Patent Document 1 discloses an audio reproducing apparatus. The audio reproducing apparatus provides a control loop which detects a fluctuation of a power source voltage of a power amplifier and feed backs the fluctuation to a switching regulator; and another control loop which feed-forwards a signal generated from a PWM signal for controlling the power amplifier to the switching regulator. That is, the apparatus provides the feed-forward control, in addition to the feedback control. With this configuration, the fluctuation of the power source voltage can be accurately controlled.
In addition, Patent Document 2 discloses a digital amplifier. The digital amplifier provides a constant voltage power source circuit for supplying a power source voltage to an output amplifying stage, and a modulation circuit which compares a PCM multi-bit digital audio input signal with an output signal from the output amplifying stage and modulates an output from the constant voltage power source circuit based on the comparison result. With this, a distortion from the output amplifying stage is decreased.
In the conventional technology, the fluctuation of the output voltage from the power source circuit is corrected corresponding to the audio output; however, the frequency of a switching clock signal of the switching regulator serving as a DC-DC converter has not been considered.
FIG. 2 is a block diagram showing a conventional digital audio system.
As shown in FIG. 2, the digital audio system provides a digital audio circuit 101, a DC-DC converter 102 which is a power source circuit, and a speaker SP.
The digital audio circuit 101 provides a first oscillating circuit 111, a digital filter 112, a ΔΣ modulator 113, a D/A converter 114, and an output amplifier (AMP) 115. The DC-DC converter 102 provides a second oscillating circuit 121 and a control circuit 122.
The DC-DC converter 102 outputs an output voltage Vdd generated from an input voltage Vin as a power source to the circuits in the digital audio circuit 101. A first clock signal CLKA output from the first oscillating circuit 111 is input to the D/A converter 114, and is used as a clock signal when the D/A converter 114 converts a digital signal into an analog signal. A second clock signal CLKB output from the second oscillating circuit 121 is input to the control circuit 122, and is used for ON/OFF control of a switching element (not shown) in the control circuit 122.    [Patent Document 1] Japanese Laid-Open Patent Application No. 2002-223132    [Patent Document 2] Japanese Laid-Open Patent Application No. 2004-128662
FIG. 3 is a graph showing frequency components of noise generated at the AMP 115.
As shown in FIG. 3, when the frequency of the first clock signal CLKA output from the first oscillating circuit 111 is 2.0 MHz and the frequency of the second clock signal CLKB output from the second oscillating circuit 111 is 2.001 MHz, large noise components are generated at the corresponding frequencies of 2.0 MHz and 2.001 MHz. Further, a noise component is generated at the frequency of 1 kHz which is a difference between the frequencies of 2.0 MHz and 2.001 MHz.
It can be said that the audible frequency range of a person is from 20 Hz to 20 kHz. Therefore the person cannot hear the noise components of the frequencies of 2.0 MHz and 2.001 MHz. However, the person can hear the nose component of the frequency of 1 kHz.
As the first oscillating circuit ill whose oscillated frequency is used by the D/A converter 114, a crystal oscillating circuit is generally used in which the oscillating frequency is highly stable. However, in many cases, as the second oscillating circuit 121 in the DC-DC converter 102, a low-cost CR oscillating circuit is used. In the CR oscillating circuit, the frequency most likely fluctuates when the driving voltage fluctuates and/or the temperature fluctuates. In addition, the oscillating frequency of the CR oscillating circuit disperses in the manufacturing process. When the difference between the frequencies of the first clock signal CLKA and the second clock signal CLKB is not large and becomes the maximum audible frequency of 20 kHz or less caused by the temperature fluctuation and/or the manufacturing dispersion, a noise signal within the audible frequency range is output from the AMP 115. Consequently, the person hears the frequency as noise.